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#123 New Forum!

Posted by Elena F on 13 February 2012 - 10:22 AM

Dear members and guests,

I am glad to announce that we launch a new forum, dedicated to FX RTOS - real-time operating system for embedded systems.

Our friendly and professional technical support will be happy to answer all your questions.


#151 MNA Equations

Posted by lauryn on 09 June 2012 - 12:23 AM

Hello,

How can I get the MNA Equations of my circuit?

Thank you.


#28 Information for new members

Posted by Elena F on 11 August 2011 - 11:16 AM

Welcome to all visitors and members.


We're happy to have you join us and become active members on our forum.



Please, read the following information about rules of our forum.

Eremex Forum Information:

Both TopoR and SimOne forums are related to the Eremex products, thus only questions, suggestions and feedback about those products should be given and discussed. For any other discussions, please, use General Topics Forum.

Eremex team will do its best to attempt to answer all messages, containing questions about features and challenges with the products, on this forum within a reasonable time.

Administrators Team reserves the right to edit, delete, move or close any thread, avatar or signature for any valid reason.

=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=

General Topics Forum Information:


This is the section where you are not limited to TopoR and SimOne related topics. Nevertheless, it's advisable to keep discussions technical related.

Enjoy the website! !


*Please be advised that your personal information will never be shared with an outside source


#48 DSN Import - pinswap supported?

Posted by Joe Gamma on 08 December 2011 - 11:43 AM

One more queston: the pinswap feature works for definitions in FST files, how about DSN?
(To quote the Version 10 Spec:)


<part_pin_descriptor>::=
(pin <pin_id> <pin_type> <gate_id>
<gate_swap_code> <gate_pin_id> <gate_pin_swap_code>
[<subgate_id> <subgate_swap_code> <subgate_pin_id>]

<gate_pin_swap_code>::= <integer>
Pins that belong to the same subgate, or to the same gate if the gate contains no subgates,
and that have the same <gate_pin_swap_code> are swappable.


If this is supported in the DSN import parser, I will be ready to roll.
(Otherwise, I need to change Eagle ULP from DSN export to FST export... :wacko:)
Thanks!


#158 manual Route in arcs?

Posted by peps1 on 09 September 2013 - 04:52 AM

Hello,

Is it possible to manual Route in arcs?


#138 Severe routing bugs

Posted by Matthias_H on 26 February 2012 - 06:36 AM

Dear TopoR Team,

After experimenting with the Free version of TopoR for quite a while, I was eager to try the new v5.3 to see if some of the old routing bugs have been fixed. Turns out they are not. All of these bugs have reported to Evgeniy Korneliyev and Elena Fulton who received me in a very friendly way, reassuring that those bugs were known and would be fixed in the near future. I also sent them some designs that show these problems. However, my first report dates back to January 2010 and as of today the bugs are still here. Here are a few examples:

Example 1: An autorouting variant with "0 Errors" leaves some wires unrouted.
Attached File  1-unrouted.png   4.76KB   33 downloads

Example 2: Freestyle Mode draws wires wildly across other wires in the same layer. After re-routing the conflicting wire in Manual Mode, resolving the errors, and switching back to Freestyle, the wire snaps back to the wrong position.
Attached File  2-crossing.png   24.97KB   37 downloads

Example 3: Switching between Manual and Freestyle makes routed wires magically disappear. After manually routing them again and switching back and forth, they are gone.

Example 4: Freestyle Mode produces non-DRC-compliant routings with wires that do not seem quite optimal. I last experienced this bug in version 5.2 because I haven't had the need to process this particular design ever since. However, since bugs 1-3 are still in there in the latest version, I would bet so is number 4.
Attached File  4-DRMIssues.gif   116.35KB   27 downloads

Overall, I like TopoR as a tool for easy manual routing and PCB beautification (my main design workflow is in EAGLE). You will find that I have in the past been very enthusiastic about your software, and recommended it in a couple of user forums. In fact, after using the free version in a handful projects, I'd love to buy a full license in the near future, even though I rarely hit the limits of the free version.

At the same time, however, these are serious issues that make it near impossible to work smoothly. Every time I correct one of the problems by hand, switching to Freestyle Mode and back kills it again. Even worse, with every update these bugs seem to appear more frequently and more severely (I have tried at least 7 different TopoR versions including the one available for download today). Am I the only one with these problems, and if not, when can we expect them to be fixed?

Kind regards,
Matthias Hullin


#152 MNA Equations

Posted by AlexPrikota on 09 June 2012 - 03:07 PM

Dear lauryn,
Thanks for your interest in SimOne.

Getting MNA Equations is simple

1. Run any circuit simulation you're interested in.
2. Choose Simulation->Export->Numeric Data... or Simulation->Export->Symbolic Data...
and specify the file-type: *.m for Matlab files or *.mw for Maple files.

Unfortunately, the feature is not well-tested yet. We'll appreciate your feedback on the matter.


#49 DSN Import - pinswap supported?

Posted by Elena F on 08 December 2011 - 01:41 PM

Do you have a specific example of it not working, or you're simply curious?

As far as I know it is supported in DSN import parser.


#159 manual Route in arcs?

Posted by Elena F on 09 September 2013 - 10:07 AM

Hello,

Is it possible to manual Route in arcs?


It is possible to route manually in the Manual Editor with "Arcs" button toggled on. In the Manual Editor the wires would appear as approximated lines, however, when you switch to the Freestyle Editor, the wires will take arc-like shapes.

In our new version 6.0, the arcs mode will be visual in the Manual Editor as well.


#153 MNA Equations

Posted by lauryn on 09 June 2012 - 06:47 PM

Hello,

I have tested it for the Example2 bat10.sch
in the .m-file I don't see where the Input Voltage sin() is...
Transistor and Diode Equations are also not in this export file...

And the comments are not readable...because its anothe language..



I need the MNA Equations because I want to try solving these equations with MATLAB..


Thank You


#140 Severe routing bugs

Posted by Elena F on 06 March 2012 - 10:11 AM

Sorry for the late reply (was away at the Embedded World 2012, Nuremberg)

Example 1: An autorouting variant with "0 Errors" leaves some wires unrouted.


This error is quite rare, so it's quite difficult to trace and resolve it. We are working closely on such issues and if you could email the project to me it will be highly appreciated.

Suggestions given in previous emails remain the same: work with sensitive issues manually and fix the segments of wires.

Example 2: Freestyle Mode draws wires wildly across other wires in the same layer. After re-routing the conflicting wire in Manual Mode, resolving the errors, and switching back to Freestyle, the wire snaps back to the wrong position.



There's been a few bugs fixed regarding wire snaps, but some of the issues remain and we hope to solve them asap.

Example 3: Switching between Manual and Freestyle makes routed wires magically disappear. After manually routing them again and switching back and forth, they are gone.


Well, this error is similar to "Example 1", so the suggestion for now is the same - fix the wires.


Example 4: Freestyle Mode produces non-DRC-compliant routings with wires that do not seem quite optimal. I last experienced this bug in version 5.2 because I haven't had the need to process this particular design ever since. However, since bugs 1-3 are still in there in the latest version, I would bet so is number 4.


These are so called "insensitivities" that we are managing as well. There's been a lot of them traced and solved, so if you try the project you've mentioned in TopoR 5.3. you should see the difference.


All in all, severe routing bugs you were reporting are quite difficult to fix within short period of time, but we are working on them.
Thank you for the report and hope to hear from you soon (with a project attached :rolleyes: )
Elena F.


#51 DSN Import - pinswap supported?

Posted by Joe Gamma on 08 December 2011 - 07:04 PM

That is good news: I just wanted to check before work today:
instead of redesign of Eagle ULP for FST export, I will add
the pinswap feature to Eagle ULP for DSN export. Thank you!


#154 MNA Equations

Posted by AlexPrikota on 13 June 2012 - 05:45 PM

Thanks for trying and finding this bugs.

There's no problem with correcting comments and sources equations.

About transistors and diode current equations:
These equations may be too cumbersome for some device models (say, MOSFET LEVEL=2,3).
For some relatively simple current equations such as SPICE-Diode, Gummel-Poon BJT, JFET transistors etc. it's possible to write down corresponding expressions explicitly, which we work on.

You may also find needed SPICE-models current equations in the literature on the topic, such as well-known The SPICE Book by A. Vladimirescu or others, and manually add them into your .m file.

We will fix the mentioned problems in the next release. See new version of SimOne soon.


#147 Severe routing bugs

Posted by Matthias_H on 26 April 2012 - 01:32 AM

Thanks for your reply Elena. I sent Evgeniy the project files back in 2010.


#52 DSN Import - pinswap supported?

Posted by Joe Gamma on 08 December 2011 - 11:00 PM

The pin swap import from DSN works!
In manual editor, the equivalent pins are marked, and the nets swap.


... now: can the autorouter do swap and ECO?
Before autorouting:
In Design Properties, Autorouter Settings ->Autorouting options,
Using Functional Equivalence, I selected 'Swap pins on a component',
but it didn't do any swaps: some are obvious swaps of nets on end of connector.

In DSN:
#      |------------------------------------------------------------------|
#      |       PIN          |                  GATE                       |
#      |------------------------------------------------------------------|
#      |    Physical | Pin  |    Gate    | Gate |       Gate       | Pin  |
#      |      Pin    | Type |    Name    | Swap |       Pin        | Swap |
#      |      Name   |      |            | Code |       Name       | Code |
#      |-------------|------|------------|------|------------------|------|
   (pin 3               5    77             3    C                    2 )
   (pin 2               5    77             3    B                    2 )
   (pin 1               5    77             3    A                    2 ))

Then, in Component Properties after import and selecting the part:

Name   Net    Pad      Pad equivalent  Gate  Gate equivalent
1      NET1   PADC52   2               1     3
2      NET2   PADC52   2               1     3
3      NET2   PADC52   2               1     3



Maybe interesting too, when "Gate Name" is 'GX' in the DSN,
the 'Gate' value in Component Properties is '0'.

Thanks again!


#53 DSN Import - pinswap supported?

Posted by Elena F on 09 December 2011 - 12:38 PM

... now: can the autorouter do swap and ECO?
Before autorouting:
In Design Properties, Autorouter Settings ->Autorouting options,
Using Functional Equivalence, I selected 'Swap pins on a component',
but it didn't do any swaps: some are obvious swaps of nets on end of connector.

In DSN:

#      |------------------------------------------------------------------|
#      |       PIN          |                  GATE                       |
#      |------------------------------------------------------------------|
#      |    Physical | Pin  |    Gate    | Gate |       Gate       | Pin  |
#      |      Pin    | Type |    Name    | Swap |       Pin        | Swap |
#      |      Name   |      |            | Code |       Name       | Code |
#      |-------------|------|------------|------|------------------|------|
   (pin 3               5    77             3    C                    2 )
   (pin 2               5    77             3    B                    2 )
   (pin 1               5    77             3    A                    2 ))

Then, in Component Properties after import and selecting the part:

Name   Net    Pad      Pad equivalent  Gate  Gate equivalent
1      NET1   PADC52   2               1     3
2      NET2   PADC52   2               1     3
3      NET2   PADC52   2               1     3



Maybe interesting too, when "Gate Name" is 'GX' in the DSN,
the 'Gate' value in Component Properties is '0'.



Could you, please, send this project so that we can work on it together and find a possible issue to solve?


#1853 problem importing from cadence

Posted by steve on 04 February 2015 - 11:12 PM

Just got the lite version to test with some designs we have going in cadence pcb. exporting to a .dsn for use with specctra works fine, but cant be imported into TopoR. Gives the error of "this file is not spectra file". I know its a valid file becasue it will open and function in specctra. we are running the latest version, 16.6, of allegro pcb designer. any ideas? it would be great to be able to import .brd files directly.

 

thanks, Steve




#31 Discussions on other forums

Posted by Elena F on 11 August 2011 - 11:37 AM

Why is there such a strong preference for 45 degree angles in PCB routing?

Using TopoR with Eagle

PCB software design

Those discussions might be interesting to read.

If any of you have more links, feel free to add :)